1. Field of the Invention
The present disclosure relates to generally to high-k materials, and in particular, to apparatus, systems, and methods for etching high-k materials.
2. Description of the Related Art
Among the hurdles to the continued miniaturization of microelectronic components are the physical limits imposed by the materials from which the components are fabricated. For example, as the thickness of a silicon dioxide gate dielectric, also referred to as an oxide gate dielectric, for a MOSFET (metal-oxide semiconductor field-effect transistor) approaches about 1 nm, the leakage current exceeds the standard specified in the International Roadmap for Semiconductors (ITRS). One approach to solving this problem is to replace the silicon oxide in the gate dielectric with a material with a higher dielectric constant or permittivity (κ or k). Such materials are referred to as high-k dielectric materials, or simply high-k materials.
One measure of a gate dielectric material is the equivalent oxide thickness (EOT), defined as the thickness of the gate dielectric material equivalent to a given thickness of silicon dioxide. A high-k material has an EOT less than 1, that is, a gate dielectric made from a high-k material is thicker than the equivalent oxide gate. Although it seems counterintuitive to use a thicker layer of material to construct a smaller device, this thicker layer eliminates leakage current through the dielectric arising from tunneling. Moreover, these thicker layers are generally more manufacturable than the extremely thin silicon dioxide layers that they replace. Although it is possible to deposit consistent, thin silicon dioxide gate dielectrics under laboratory conditions, commercially producing devices with oxide gate dielectrics of such dimensions is challenging. Furthermore, scaling with silicon oxide is also limited by physical limitations, for example, tunneling. Similar considerations apply to capacitor dielectrics. One consequence of these manufacturing difficulties is reduced reliability of the devices.
The manufacture of integrated devices includes masking, patterning, deposition, and etching steps for many of the materials used in the fabrication of a device. Because these steps are typically carried out sequentially, a single slow or inefficient step can disrupt the workflow of the entire manufacturing process. The cleaning cycles of the manufacturing devices can also affect workflow. For example, a slow cleaning step will either reduce the throughput of the entire manufacturing line, or necessitate acquisition of redundant manufacturing capacity.
Many high-k materials, for example, Al2O3, HfO2, ZrO2, and Ta2O5, are etchable using plasma activated BCl3. It is believed that energetic chlorine species, for example, chlorine radicals, are the etching species. Other etching processes for high-k materials use other thermal and/or plasma activated halide species. These methods are often inadequately selective, etching more than the intended layers, however, and as such, are difficult to control.